W25Q80DLSNIG TR

W25Q80DV/DL 2.5V AND 3V 8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI - 1 - Publication Release Date:May 05, 2021 Preli mry-Revision I W25Q80DV/DL Table of Contents 1. 2. 3. 4. 5. 6. GENERAL DESCRIPTION ......................................................................................................... 5 FEATURES ................................................................................................................................. 5 PACKAGE TYPES AND PIN CONFIGURATIONS..................................................................... 6 3.1 Pin Configuration SOIC 150-MIL/208-mil AND VSOP 150-mil: ...................................... 6 3.2 Pad Configuration WSON 6x5-mm, USON 2X3-mm...................................................... 6 3.3 Ball Configuration WLCSP .............................................................................................. 7 3.4 Ball Description WLCSP ................................................................................................. 7 PIN DESCRIPTIONS .................................................................................................................. 8 4.1 Chip Select (/CS) ............................................................................................................ 8 4.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3)............................... 8 4.3 Write Protect (/WP) ......................................................................................................... 8 4.4 HOLD (/HOLD)................................................................................................................ 8 4.5 Serial Clock (CLK) .......................................................................................................... 8 BLOCK DIAGRAM ...................................................................................................................... 9 FUNCTIONAL DESCRIPTION.................................................................................................. 10 6.1 SPI OPERATIONS ....................................................................................................... 10 Standard SPI Instructions ............................................................................................... 10 Dual SPI Instructions ...................................................................................................... 10 Quad SPI Instructions ..................................................................................................... 10 Hold Function .................................................................................................................. 10 6.2 WRITE PROTECTION .................................................................................................. 11 Write Protect Features .................................................................................................... 11 7. CONTROL AND STATUS REGISTERS ................................................................................... 12 7.1 STATUS REGISTER .................................................................................................... 12 BUSY .............................................................................................................................. 12 Write Enable Latch (WEL) .............................................................................................. 12 Block Protect Bits (BP2, BP1, BP0) ................................................................................ 12 Top/Bottom Block Protect (TB) ....................................................................................... 12 Sector/Block Protect (SEC) ............................................................................................. 12 Complement Protect (CMP) ............................................................................................ 12 Status Register Protect (SRP1, SRP0) ........................................................................... 13 Erase/Program Suspend Status (SUS) ........................................................................... 13 Security Register Lock Bits (LB3, LB2, LB1) ................................................................... 13 Quad Enable (QE) ........................................................................................................ 14 Status Register Memory Protection (CMP = 0) ............................................................. 15 Status Register Memory Protection (CMP = 1) ............................................................. 16 8. INSTRUCTIONS ....................................................................................................................... 17 8.1 Manufacturer and Device Identification ........................................................................ 17 8.2 Instruction Set Table 1 (Standard SPI Instructions)(1) .................................................. 18 8.3 Instruction Set Table 2 (Dual SPI Instructions) ............................................................. 19 8.4 Instruction Set Table 3 (Quad SPI Instructions) ........................................................... 19 8.5 Instruction Descriptions ................................................................................................ 21 Write Enable (06h) .......................................................................................................... 21 Write Enable for Volatile Status Register (50h) ............................................................... 21 - 2 - Publication Release Date:May 05, 2021 Preli mry-Revision I W25Q80DV/DL Write Disable (04h) ......................................................................................................... 22 Read Status Register-1 (05h) and Read Status Register-2 (35h) ................................... 23 Write Status Register (01h)............................................................................................. 24 Read Data (03h) ............................................................................................................. 25 Fast Read (0Bh).............................................................................................................. 26 Fast Read Dual Output (3Bh) ......................................................................................... 27 Fast Read Quad Output (6Bh) ........................................................................................ 28 Fast Read Dual I/O (BBh) ............................................................................................. 29 Fast Read Quad I/O (EBh)............................................................................................ 30 Set Burst with Wrap (77h) ............................................................................................. 32 Page Program (02h) ..................................................................................................... 33 Quad Input Page Program (32h) ................................................................................... 34 Sector Erase (20h) ........................................................................................................ 35 32KB Block Erase (52h)................................................................................................ 36 64KB Block Erase (D8h) ............................................................................................... 37 Chip Erase (C7h / 60h) ................................................................................................. 38 Erase / Program Suspend (75h) ................................................................................... 39 Erase / Program Resume (7Ah) .................................................................................... 40 Power-down (B9h) ........................................................................................................ 41 Release Power-down / Device ID (ABh) ....................................................................... 42 Read Manufacturer / Device ID (90h) ........................................................................... 44 Read Manufacturer / Device ID Dual I/O (92h) ............................................................. 45 Read Manufacturer / Device ID Quad I/O (94h) ............................................................ 46 Read Unique ID Number (4Bh) ..................................................................................... 47 Read JEDEC ID (9Fh) .................................................................................................. 48 Read SFDP Register (5Ah)........................................................................................... 49 Erase Security Registers (44h) ..................................................................................... 50 Program Security Registers (42h) ................................................................................. 51 Read Security Registers (48h) ...................................................................................... 52 Enable Reset (66h) and Reset (99h) ............................................................................ 53 9. 10. ELECTRICAL CHARACTERISTICS ......................................................................................... 54 9.1 Absolute Maximum Ratings(1)(2) .................................................................................... 54 9.2 Operating Ranges ......................................................................................................... 54 9.3 Power-up Timing and Write Inhibit Threshold(1)............................................................ 55 9.4 DC Electrical Characteristics ........................................................................................ 56 9.5 AC Measurement Conditions ........................................................................................ 57 9.6 AC Electrical Characteristics ........................................................................................ 58 9.7 Serial Output Timing ..................................................................................................... 60 9.8 Serial Input Timing ........................................................................................................ 60 9.9 Hold Timing ................................................................................................................... 60 9.10 /WP Timing ................................................................................................................... 60 PACKAGE SPECIFICATION .................................................................................................... 61 10.1 8-Pin SOIC8 150-mil (Package Code SN) .................................................................... 61 10.2 8-Pin SOIC8 208-mil (Package Code SS) .................................................................... 62 10.3 8-Pin VSOP8 150-mil (Package Code SV) ................................................................... 63 10.4 8-Pad WSON 6x5mm (Package Code ZP) .................................................................. 64 10.5 8-Pad USON 2x3x0.6-mm^³ (Package Code UX, W25Q80DV/DL:UXIE) ................... 65 - 3 - Publication Release Date:May 05, 2021 Preli mry-Revision I W25Q80DV/DL 11. 10.6 8-Ball WLCSP (Package Code BY) .............................................................................. 66 10.7 Ordering Information ..................................................................................................... 67 10.8 Valid Part Numbers and Top Side Marking .................................................................. 68 REVISION HISTORY ................................................................................................................ 69 - 4 - Publication Release Date:May 05, 2021 Preli mry-Revision I W25Q80DV/DL 1. GENERAL DESCRIPTION The W25Q80DV/DL (8M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The W25Q80DV operates on a single 2.7V to 3.6V and the W25Q80DL operateds on a single 2.3V to 3.6V power supply with current consumption as low as 1µA for power-down. The W25Q80DV/DL array is organized into 4,096 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q80DV/DL has 256 erasable sectors and 16 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See figure 2.) The W25Q80DV supports the standard Serial Peripheral Interface (SPI), and a high performance Dual/Quad output as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. A Hold pin, Write Protect pin and programmable write protection, with top, bottom or complement array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification with a 64-bit Unique Serial Number. 2. FEATURES  Family of SpiFlash Memories – W25Q80DV/DL: 8M-bit/1M-byte (1,048,576) – 256-byte per programmable page – Standard SPI: CLK,/CS,DI,DO,/WP,/Hold – Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold – Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3 – Uniform 4KB Sectors, 32KB & 64KB Blocks  Low Power, Wide Temperature Range – W25Q80DV: Single 2.7 to 3.6V supply – W25Q80DL: Single 2.3 to 3.6V supply –